Two Capacitors in Parallel

Capacitors side by side across the same two nodes see the same voltage, and each stores the charge that voltage buys it: $Q_1 = C_1 V$ and $Q_2 = C_2 V$. The total charge held is the sum, so the total capacitance — charge per volt — is also the sum, $C_t = C_1 + C_2$. Physically the two components have simply become one larger capacitor: parallel connection joins their plates, and joining plates adds plate area. Since capacitance for a parallel-plate part is $C = \varepsilon A / d$, more area at the same separation means proportionally more capacitance, and the arithmetic could hardly come out any other way.

A 4.7 µF and a 2.2 µF part in parallel behave as 6.9 µF. Three 1000 µF electrolytics across a power-supply rail behave as 3000 µF. The additions are exact and there is no upper limit beyond what will fit on the board, which is why designers reach for parallel banks to hit values no manufacturer stocks — 4.7 with 2.2 to make 6.9 — and why a supply that needs 10 000 µF of bulk storage is built from several parts rather than one.

There is a second reason for the bank that has nothing to do with capacitance. Every real capacitor carries series resistance and series inductance in its own leads and foil, and putting parts in parallel divides both. Ten capacitors in parallel have a tenth of the equivalent series resistance, so they run cooler under ripple current and hold the rail steadier under a sudden load step. This is also why you find a 100 nF ceramic beside a 470 µF electrolytic beside a chip: the electrolytic supplies the bulk energy, the ceramic — low inductance, fast — supplies the first microsecond, and in parallel they cover a band neither covers alone.

The one big mistake is the combination rule itself, in mirror image: parallel capacitors add, series capacitors do not. Reaching for product-over-sum on a parallel pair gives an answer smaller than either part, which is your signal that the wrong rule has been applied — parallel connection can only ever increase capacitance. Two subtler points matter in practice. Ripple current in a parallel bank does not divide by capacitance; it divides by impedance, so a bank of mismatched parts overloads whichever has the lowest ESR while the others idle, and a bank should be built from identical parts. And the big-plus-small pairing described above can, at some megahertz frequency, form a parallel resonance between the small capacitor's capacitance and the large one's lead inductance, producing an impedance peak exactly where you wanted a low one. At mains and audio frequencies none of this matters and the addition is all you need.