Dennard Scaling and Power Density

Robert Dennard and his colleagues at IBM set out in 1974 the rules for shrinking a MOSFET without changing how it behaves. Divide every dimension by $\kappa$ — length, width, oxide thickness — divide the supply voltage by $\kappa$ as well, and multiply the doping by $\kappa$. The electric field inside the device stays the same, which is why it is called constant-field scaling, and the device keeps working the way it did.

Follow the consequences and something remarkable falls out. Gate capacitance is $\varepsilon A/t$: the area falls by $\kappa^2$ and the oxide thins by $\kappa$, so $C$ falls by $\kappa$. The supply falls by $\kappa$, so $V^2$ falls by $\kappa^2$. Delay is proportional to $CV/I$ and works out $\kappa$ times shorter, so the device runs $\kappa$ times faster. Power per device is $CV^2f$, which is $(1/\kappa)(1/\kappa^2)(\kappa) = 1/\kappa^2$. And $\kappa^2$ times as many devices now fit in the same area. The two cancel exactly: power per unit of chip area stays constant. Smaller, faster, denser, and no hotter — all at once, for free, every node.

That is what ended around 2005, and the culprit is threshold voltage. The supply rail has to stay comfortably above the threshold or the transistor switches too slowly to be useful, so scaling the supply requires scaling the threshold. But subthreshold leakage is exponential in the threshold: drop it by about 60 to 100 mV and the off-state current rises tenfold. Below roughly 1 V the leakage penalty for continuing to scale the threshold became larger than the dynamic power saved, and voltage scaling stopped. Dimensions kept shrinking; voltage did not. This solver's ratio $(\kappa/\nu)^2$ is exactly that mismatch, and it is 1 only in the ideal case Dennard described.

The consequences reorganised computing. Clock frequencies stopped climbing and have sat between 3 and 5 GHz ever since. The industry turned to multiple cores, which moved the performance ceiling from circuit design to Amdahl's law and to whether the software could be parallelised at all. Dark silicon appeared — the fraction of a chip that cannot be powered simultaneously within the thermal budget — and with it the specialised accelerators that make the powered fraction count for more. FinFETs from about 2011 and gate-all-around structures more recently improved electrostatic control enough to keep dimensions shrinking, but none of them restored constant power density. That particular free lunch is over.